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The CS61535A combines the complete analog transmit-and-receive line interface for T1 or E1 applications in a low-power, 28-pin device operating from a 5 V supply. The device features a transmitter jitter attenuator, making it ideal for use in asynchronous multiplexer systems with gapped transmit clocks. The CS61535A provides a matched, constant impedance output stage to ensure signal quality on mismatched, poorly terminated lines. The device uses a digital DLL (delay-locked loop) clock and data recovery circuit, which is continuously calibrated from a crystal reference to provide excellent stability and jitter tolerance. |
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| Power Supply (V) | Control Modes | Line Coders | Number of Channels | TBR-12 Compliant | Impedance Matching Line Driver | Package |
|---|---|---|---|---|---|---|
| 5 | Host, H/W & Extended H/W | AMI, B8ZS & HDB3 | 1 |  |
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28 PDIP 28 PLCC |
The CS61535A combines the complete analog transmit-and-receive line interface for T1 or E1 applications in a low-power, 28-pin device operating from a 5 V supply.
The device features a transmitter jitter attenuator, making it ideal for use in asynchronous multiplexer systems with gapped transmit clocks. The CS61535A provides a matched, constant impedance output stage to ensure signal quality on mismatched, poorly terminated lines.
The device uses a digital DLL (delay-locked loop) clock and data recovery circuit, which is continuously calibrated from a crystal reference to provide excellent stability and jitter tolerance.
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